An increasing number of electronic equipment and electronic-based systems require some form of high-speed memory devices for storing and retrieving information (or "data"). While the types of such memory devices vary widely, semiconductor memory devices are most commonly used in memory applications requiring implementation in a relatively small area. Within this class of semiconductor memory devices, the DRAM (Dynamic Random Access Memory) is one of the more commonly used types.
The DRAM has memory arrays consisting of a number of intersecting row and column lines of individual transistors or memory cells. Typically, a microcomputer circuit selects (or activates) particular row and column lines to access selected memory cells. "Access" typically refers to reading data from or writing data to selected memory cells. Reading data from the memory cells involves the use of a sense amplifier to detect whether the voltage level stored in the memory cell represents a binary one or a binary zero.
Conventionally, a DRAM contains one sense amplifier for a designated group (row or column) of memory cells. The sense amplifier senses the voltage level in the selected memory cell of the memory cell group via a pair of digit lines. If the voltage level stored in the memory cell represents a binary zero, one of the digit lines will increase in level and the other digit line will decrease in level. If the voltage level stored in the selected memory cell corresponds to a binary one, a change in the opposite direction occurs. Through this complementary operation, the sense amplifier yields a single output signal which is coupled through an output buffer to an output pin of the DRAM device.
In connection with the present invention, it has been discovered that the output signal from the sense amplifier is often defective, or bordering on being defective, due to one or more circuit problems in the path between the memory cell and the output pad controlled by the output buffer. For example, laboratory testing has shown that such defects are caused by an imbalance in the sections of the sense amplifier which couple to the digit lines, excessive resistivity in a node or metal contact, or a defect in a poly layer.
Detecting such defects before the DRAM circuit is encapsulated as part of the final product is important, because the only remedy to such a problem when it is detected after packaging is the disposal of the device. By detecting such defects before packaging, spare (or redundant) memory cells and/or sense amplifiers can be used to replace the defective circuits, for example, using conventional laser fusing equipment.
Accordingly, there is a need for an improved method and circuit arrangement that overcomes the above-mentioned deficiencies and increases the yield of memory devices during the manufacturing process. The present invention provides a solution to these and other problems, offering advantages over conventional implementations.